BT Group Joins the CHERI Alliance to Advance Cybersecurity Innovation
Cambridge, UK – 18 June 2025 – The CHERI Alliance, a global coalition dedicated to enhancing cybersecurity through groundbreaking hardware memory safety technology, is proud to announce that BT Group has joined its ranks. As one of the world’s leading telecommunications companies, BT brings decades of expertise in network security and innovation to the Alliance, further […]
Unlocking the Future: A Roadmap for CHERI Technology Advancement
Mike Eftimakis – CHERI Alliance In the rapidly evolving landscape of cybersecurity, the quest for robust and secure hardware foundations has never been more critical. A groundbreaking paper from the Defence Science and Technology Laboratory (DSTL) – Biting the CHERI bullet: Blockers, Enablers and Security Implications of CHERI in Defence – sheds light on the […]
Recent advances in CHERI enhancing stability, maturity, and accessibility as urged by the UK’s DSTL
Andy Lindsay & Carl Shaw – Codasip The DSTL paper “Biting the CHERI bullet: Blockers, Enablers and Security Implications of CHERI in Defence” collates and analyzes feedback on CHERI development by 15 independent teams across industry and academia on the Morello research platform. This work provides a useful set of feedback based on their Morello […]
CHERIoT-Ibex Core is Open Sourced to Enable Memory Safe MCUs
Source: https://www.eetimes.com/cheriot-ibex-core-is-open-sourced-to-enable-memory-safe-mcus/
lowRISC and SCI Semiconductor Release Sunburst Chip Repository for Secure Microcontroller Development
“Open source release accelerates path to market for commercial CHERIoT-based secure microcontrollers, supporting industry adoption and innovation.” lowRISC C.I.C. and SCI Semiconductor have announced the release of the open source Sunburst Chip design repository, a major step towards commercialising secure, CHERIoT-Ibex based microcontrollers. This marks a milestone in the DSbD/UKRI-funded Sunburst Project and supports SCI’s […]
