Pre-Conference Tutorial: 25 March 2026
Main Conference Date: 26 – 27 March 2026
Location: Department of Computer Science and Technology – William Gates Building, University of Cambridge, Cambridge, UK
Thank you to all who attended!
You can find details about CHERI Blossoms 2027 here.
The CHERI Blossoms Conference 2026 was the must-attend event for forward-thinking decision-makers and innovators! This exclusive gathering was tailored for industry leaders, business strategists, product managers, researchers and technologists, who are poised to influence the future of digital security by design.
At this premier event, participants had the unique opportunity to engage with top experts and gain firsthand insights into the latest developments using CHERI (Capability Hardware Enhanced RISC Instructions) technology. Participants discovered how these cutting-edge advancements are revolutionizing the creation of resilient, secure systems and learn how integrating these innovations can provide a competitive edge for your organization.
Over 100 people attended the livestream via Zoom.
The CHERI Research Centre at the Computer Laboratory, Codasip, and lowRISC hosted a hands-on tutorial the day before CHERI Blossoms 2026. Designed for students, researchers, and developers, the session covered CHERI and CHERIoT, memory safety, compartmentalisation, and related hardware-software stacks, with presentations, code examples, and guided exercises.
The CHERI Research Centre at the Computer Laboratory, Codasip, and lowRISC co-organised a comprehensive tutorial on CHERI alongside the conference.
The agenda for the tutorial can be found on the tutorial webpage.
The main conference ran over two consecutive days (Thursday and Friday), with the exhibition space open throughout.
Each day of the conference had a distinct focus:
Pre-Conference Tutorial (Wednesday 25th March 2026)
Main Conference – Day 1 (Thursday 26th March 2026)
Main Conference – Day 2 (Friday 27th March 2026)
| Talk Title | Author | Organisation | Video | Slides | Speaker |
|---|---|---|---|---|---|
| CHERI crash course - high-level introduction | Robert Watson | University of Cambridge | |||
| Keynote – CHERI: quantifying the value of a strategic imperative | Ollie Whitehouse | National Cyber Security Centre | |||
| Featured Message | Kathleen Fisher | ARIA | - | ||
| Keynote – Memory Safety at Scale: An Industry Perspective | Alex Rebert | ||||
| Keynote – Getting ready for the CRA: from compliance to confidence | Maika Föhrenbach | European Commission (DG CONNECT) | - | ||
| DSIT message | Bradley Finn | DSIT | |||
| UKRI message | John Goodacre | UKRI | - | ||
| Progress of the Alliance | Mike Eftimakis | CHERI Alliance | |||
| CHERI Research Centre | Robert Watson | CHERI Research Centre | |||
| The Capable Hub: Our Recent Work and Next Steps | Andrew Murray | The Capable Hub | |||
| CHERI Adoption study | Adam Finney | CHERI Alliance | - | ||
| Accelerating commercial adoption of CHERI | Manu Ravishankar | PA Consulting | |||
| A new analysis of CVE vulnerabilities : trends, changes and CHERI | Carl Shaw | Codasip | |||
| CHERI Mocha: an open-source memory-safe application system | Javier Orensanz Martinez | lowRISC | |||
| BT business keynote | Dave Harcourt | BT | - | ||
| ETSI Standardisation status | Paul Waller | NCSC | - | ||
| RISC-V: Driving the Future of Open Compute | Andy Moore | RISC-V International | |||
| CHERI RISC-V Standardisation Status | Tariq Kurd | Codasip | - | ||
| BT's Engagement with CHERI Technology | Sam Cater | BT | |||
| Inside the CHERI in SoC Working Group | Ben Fletcher | CHERI Alliance | |||
| MMU-based revocation for temporal safety on CHERI application cores | Tariq Kurd / Alfredo Mazzinghi | Codasip / Capabilities Limited | |||
| COSMIC verification: comprehensive, end-to-end formal proofs of CVA6-CHERI | Louis-Emile Ploix / Marno van der Maas | lowRISC CIC | |||
| CHERI is being standardised, so why do we still need to do research? | Simon Moore | University of Cambridge | |||
| Lightning talk - CHERIoT-Kudu | David Chisnall | SCI Semiconductor | |||
| Lightning talk - Portable CHERI OS APIs | Paul Metzger | University of Cambridge | - | ||
| Lightning talk - CHERI-PIT: Port Integrity Tool | David Musliner | SIFT | |||
| Lightning talk - CHERI-Zephyr | Jennifer Jackson | University of Birmingham | |||
| Lightning talk - Microservice Store | Murat Cakmak | Microservice Store | |||
| Performance Progress of CVA6-CHERI | Jonathan Woodruff | Capabilities Limited | |||
| CHERI performance improvement update | Carl Shaw | Codasip | |||
| Securing Real-Time Communication: Porting and running Edge Computing for mission critical services on Morello CHERI | Peter Cox / Alexander Voevoda | UM Labs | |||
| Rust on CHERIoT | Edoardo Marangoni | SCI Semiconductor | |||
| CHERI Linking through the Ages | John Baldwin / Jessica Clarke | Ararat River Consulting, LLC / University of Cambridge | |||
| Verifying Secure Memory Compartmentalization in CHERI Processors at the RTL | Johannes Müller | RPTU Kaiserslautern-Landau | |||
| CHERI-enabled RISC-V VP: Capabilities and Applications | Luca Müller | German Research Center for Artificial Intelligence (DFKI) | |||
| Anonymous Title | Merve Gülmez / Thomas Nyman | Ericsson | - | - | |
| Towards Heterogeneous CHERI Compartmentalization | Jianyi Cheng | University of Edinburgh | |||
| All-Caps — Extending Capabilities Across the Whole SoC | Samuel Stark | University of Cambridge |
ARIA
European Commission (DG CONNECT)
CHERI Alliance
RISC-V International
DSIT
Smart Information Flow Technologies (SIFT)
University of Edinburgh
Ararat River Consulting, LLC
UKRI
German Research Center for Artificial Intelligence (DFKI)
PA Consulting
Ericsson
CHERI Alliance
Microservice Store
CHERI Alliance, University of Cambridge
Ericsson
CHERI Blossoms 2026 was held in Cambridge UK, at the Department of Computer Science and Technology in the William Gates Building, on the University of Cambridge’s West Cambridge site, located off Madingley Road.
William Gates Building
15 JJ Thomson Ave
Cambridge CB3 0FD
