Codasip’s CHERI-RISC-V processors and exploration kit enable breakthrough secure chip development and accelerate software innovation
The UK government’s ambitious Digital Security by Design initiative continues to gain momentum, with Codasip playing a pivotal role in two key innovation contracts announced as part of the program’s £21 million investment to advance hardware-based cybersecurity technology.
EnSilica Partnership Delivers Quantum-Resilient Security Chip
EnSilica has been awarded a £5 million ‘Contract for Innovation’ by the UK Government’s Department for Science, Innovation and Technology (DSIT) to develop a quantum-resilient secure processor chip for critical national infrastructure applications. At the heart of this groundbreaking development is Codasip‘s CHERI-RISC-V CPU technology.
Following their strategic partnership announced in September 2025, Codasip is supplying its leading-edge 32-bit and 64-bit CHERI-RISC-V CPUs to EnSilica. EnSilica will use Codasip‘s portfolio of CHERI RISC-V processors as the foundation for developing customer-specific System-on-Chip (SoC) integrated circuits.
The resulting commercial-off-the-shelf (COTS) CHERI-compliant secure processor chip will target next-generation quantum-resilient applications requiring the highest levels of security and functional safety, with relevance across defence, industrial, automotive and aerospace markets.
“Our strategic partnership with EnSilica is already gaining momentum as we work together to unlock the full potential of our leading-edge 32-bit and 64-bit CHERI-RISC-V CPUs,” said Dr Ron Black, Chief Executive of Codasip. “This first collaboration marks an exciting milestone and opens the door to further opportunities.”
Ian Lankshear, Chief Executive of EnSilica, added: “Partnering with Codasip allows us to bring commercial-grade CHERI-enabled security into our next-generation secure quantum-resilient microcontroller.”
Codasip Prime Enables Software Innovation Across Multiple Projects
Beyond hardware development, Codasip is accelerating CHERI software adoption through its comprehensive exploration kit, Codasip Prime. This platform is being provided to numerous Digital Security by Design contract winners working on software development and operating system porting initiatives.
Based on commercially available IP, Codasip Prime enables advanced development of memory-safe and secure software, allowing hardware and software engineers to evaluate and demonstrate the capabilities of the CHERI technology, develop and run CHERI software, and integrate CHERI hardware into wider test systems.
The kit features:
- A high-performance FPGA system based on the Codasip X730 64-bit RISC-V CHERI Application CPU
- Security IP for secure boot and secure debug, including True Random Number Generator and a Test Access Port Protection Unit
- CHERI-specific IP for capability tag management for DDR memory
- CHERI Linux capability-only (purecap) kernel and userspace
- Complete CHERI Software Development Kit with a CHERI C/C++ tool chain including compiler and debugger, Secure Boot, and a QEMU virtual platform that matches the FPGA
“Codasip Prime allows software developers to create and evaluate their applications before chips are built,” explained Jamie Broome, Codasip’s chief product officer. “In addition to hardware IP and software, we offer engineering support from our CHERI experts.”
Advancing the CHERI Ecosystem
Codasip is a founding member of the CHERI Alliance, whose engineers have played a key role in defining the CHERI-RISC-V specification, and whose embedded cores have earned industry recognition.
The company’s processors are developed in line with ISO 26262 functional safety and ISO 21434 cybersecurity standards, and come with a complete ecosystem including CHERI toolchain, CHERI Linux, and CHERI RTOSes.
The UK government has allocated £21 million to advance hardware-based cybersecurity technology designed to counter up to 70% of common cyberattacks through the CHERI security architecture. Almost £15 million is being distributed via the Advancing CHERI RISC-V Devices competition to three companies: EnSilica, SCI Semiconductor, and lowRISC.
About CHERI Technology
CHERI represents a transformative hardware security architecture designed to mitigate memory safety vulnerabilities, one of the most significant sources of modern cyberattacks, and provides fine-grained compartmentalisation to increase software robustness and resilience.
Memory safety vulnerabilities are used in up to 87% of cyberattack chains according to one study, with losses due to the well-known Heartbleed bug estimated to exceed $500 million. CHERI is the most cost-effective way to protect against memory safety vulnerabilities, as it is backwards compatible, allows migration to safer code, and makes C/C++ memory safe, avoiding costly software re-writes.
About Codasip
Codasip is a processor technology company enabling system-on-chip developers to differentiate their products for competitive advantage. As a founding member of the CHERI Alliance, Codasip is at the forefront of delivering commercial CHERI-RISC-V processor solutions that combine hardware-enforced memory safety with high performance and functional safety compliance.