ICENI: First Look

For more than a decade, CHERI research has demonstrated that hardware enforced memory safety can eliminate entire classes of security vulnerabilities. Much of this work has taken place in simulators and FPGA platforms, enabling researchers and developers to experiment with capability based architectures before production hardware became available. The CHERIoT project extends these principles to […]
The Capable Hub joins the CHERI Alliance to accelerate cybersecurity collaboration

Strengthening the CHERI ecosystem through Open-Source innovation We are excited to announce that The Capable Hub has become a member of the CHERI Alliance, a significant step forward in our mission to accelerate CHERI adoption. Improving the availability, quality, and upstream alignment of CHERI-enabled open-source software will make the design of CHERI-secured products easier and […]
Amid rising cyber threats, EnSilica joins the CHERI Alliance to enable safe & secure silicon

Oxford UK – 3 February 2026 – EnSilica, a leading provider of mixed-signal ASICs (Application-Specific Integrated Circuits), today announced that it has joined the CHERI Alliance. In a world facing an explosion of cyber threats, this collaboration will accelerate the adoption of a technology that could eliminate more than 70% of current vulnerabilities. The Power of […]
Codasip Powers UK Digital Security by Design Innovation Contracts with CHERI Technology
Andrew Lindsay – Codasip Codasip’s CHERI-RISC-V processors and exploration kit enable breakthrough secure chip development and accelerate software innovation The UK government’s ambitious Digital Security by Design initiative continues to gain momentum, with Codasip playing a pivotal role in two key innovation contracts announced as part of the program’s £21 million investment to advance hardware-based […]
CHERI or CHERIoT? The Answer Is Not What You Think

Adam Finney – CHERI Alliance Interest in capability based security has grown rapidly as organisations look for practical ways to move beyond legacy memory protection. As more projects explore CHERI technologies, a common question keeps surfacing: should we use CHERI or CHERIoT? At first glance it sounds like a straightforward architectural decision, but as David […]
New InnovateUK-funded project to merge CHERI support into FreeBSD
Brooks Davis – Capabilities Limited Capabilities Limited, a founding member of the CHERI Alliance, is pleased to announce that we have received funding from Innovate UK for our 22 month project: CheriBSD feature extraction, maturity, and testing. CheriBSD is an operating system developed by the University of Cambridge, SRI International, and Capabilities Limited over the […]
Innovate UK Project Winner: University of Birmingham

Mihai Ordean – University of Birmingham Innovate UK Project Winner At the University of Birmingham, in the Centre for Cyber Security and Privacy, we have over 15 years of combined experience working on the CHERI (Capability Hardware Enhanced RISC Instructions) architectures. Over the years, we have made multiple contributions to the development of CHERI, with […]
Several CHERI Alliance members win the DSbD competition to deliver new CHERI chips and software

Exciting news for the CHERI community! The winners of the latest Digital Security by Design (DSbD) innovation competitions have been announced, and once again the CHERI Alliance is right at the heart of the action. Across the two competitions – Advancing CHERI RISC-V Devices and Advancing CHERI Tools and Software – eight projects have been […]
lowRISC and Partners to Deliver Commercial-Quality, Open-Source CHERI Secure Enclave with InnovateUK Support

lowRISC CIC and Capabilities Limited, two founding members of the CHERI Alliance, have announced the launch of the COSMIC Project, supported by the UK Department for Science, Innovation and Technology (DSIT) and InnovateUK. The 3 year initiative will deliver the first commercial-quality, open-source, CHERI-enabled 64-bit Secure Enclave for application-class system-on-chips (SoCs). By combining CHERI hardware […]
CHERIoT 1.0 Specification Released

Adam Finney – CHERI Alliance 5 November 2025, Cambridge – New Release CHERIoT 1.0 provides a stable, hardware-enforced platform for building memory safe, compartmentalised systems in the microcontroller class. The specification defines the instruction set architecture, language extensions, and the complete compilation and relocation model, enabling developers to build software that is safeguarded against buffer […]