Hands-on Introduction to CHERI and CHERIoT

Date: 25 March 2026

Location: Department of Computer Science and Technology – William Gates Building, University of Cambridge, Cambridge, UK

Thank you to all who attended!

Event Overview

The CHERI Research Centre at the Computer Laboratory, Codasip, and lowRISC co-organised a comprehensive tutorial on CHERI alongside the CHERI Blossoms 2026 conference.

The aim of this tutorial was to introduce attendees, in particular students, researchers and developers from academia and industry, to CHERI and CHERIoT, memory safety and compartmentalization aspects of them, and hardware-software stacks involving CheriBSD, CHERI Linux and CHERIoT RTOS. The material presented on the day will included presentations, CHERI and CHERIoT code examples and practical exercises that the participants were given time to work on with assistance from the organisers.

Agenda

The agenda of the tutorial was:

9:15 – 9:30 : Registration
9:30 – 10:30 : Part I – Introduction to CHERI, memory safety and compartmentalization (1h)
10:30 – 10:45 : Break (15 min)
10:45 – 11:45 : Part I – CHERI software experimentation on CheriBSD/Morello (1h)
11:45 – 12:45 : Light lunch with sandwiches (1h)
12:45 – 13:45 : Part II – CHERI-RISC-V, Codasip X730 and CHERI Linux (1h)
13:45 – 14:00 : Break (15 min)
14:00 – 15:00 : Part II – CHERI-RISC-V, Codasip X730 and CHERI Linux (1h)
15:00 – 15:15 : Break (15 min)
15:15 – 16:15 : Part III – CHERIoT, lowRISC’s Sonata FPGA and CHERIoT RTOS (1h)
16:15 – 16:30 : Break (15 min)
16:30 – 17:30 : Part III – CHERIoT, lowRISC’s Sonata FPGA and CHERIoT RTOS (1h)

We encouraged potential participants to attend the whole tutorial, but it is acceptable to join individual parts of it if the participant has any time constraints, e.g. due to conflicting studying activities or travel. Slides and teaching materials will be available after the tutorial.

The tutorial was a perfect opportunity to get to know what the CHERI technology is, what research areas are related to it, and how to get started experimenting with CHERI-extended hardware-software stacks. The participants were expected to be familiar with C/C++. No prior knowledge of CHERI was required, but we recommended ahead of the tutorial to read the “CHERI: Hardware-Enabled C/C++ Memory Protection at Scale” article published in the IEEE Security & Privacy magazine. The material described in there will was covered during the tutorial but getting familiar with some of the terms ahead of the tutorial will have helped you identify potential gaps in background knowledge and think of questions to ask.

Additional Information

Participants had to bring their own laptop with an SSH client installed on it. For participants without access to eduroam, guest access to the Computer Lab’s WiFi was provided.

For Parts I and II, no additional steps were required.

For Part III, participants were expected to prepare a work environment to experiment with the lowRISC’s Sonata platform. lowRISC had a small number of laptops and Sonata boards available to borrow on the day. If you had your own Sonata board, you were asked to please bring it with you to the tutorial. Regardless of having the Sonata board, participants were asked to follow the steps of the Sonata software getting started guide up to the section 1.1 “Running Sonata software” ahead of the tutorial.

Venue

The Hands-on Introduction to CHERI and CHERIoT was held in Cambridge UK, at the Department of Computer Science and Technology in the William Gates Building, on the University of Cambridge’s West Cambridge site, located off Madingley Road.

For details of how to find the room, please visit the William Gates Building layout page.