Tariq Kurd

Codasip

Biography

Tariq Kurd has been involved in CPU architecture, design, and verification for over 25 years, primarily in the embedded field. He has worked on VLIW, multithreading, out-of-order cores, security, and DSP style cores. He has been with Codasip for over three years and previously worked at Huawei UK, Broadcom and Nvidia.

Tariq previously chaired RISC-V International’s Zfinx and Code Size Reduction task groups. He started working looking at CHERI around 2021 and is the lead architect of Codasip’s X730 which is the world’s first commerically available CHERI-RISC-V application processor.

Tariq Kurd

CHERI Talks

MMU-based revocation for temporal safety on CHERI application cores | CHERI Blossoms 2026

27/03/2026

Cambridge, UK

CHERI RISC-V Standardisation Status | CHERI Blossoms 2026

26/03/2026

Cambridge, UK

CHERI-RISC-V standardisation status | CHERITech’25

14/11/2025

Manchester, UK

CHERI RISC-V Standardisation | CHERI Blossoms 2025

02/04/2025

Cambridge, UK